Our research presents the first wirelessly synchronized multichip array (WSMA) in 65-nm CMOS. The proposed architecture makes use of a central wireless signal to synchronize an mm-wave array, eliminating the need for connecting wires between the array elements. Wireless injection locking of a single chip is successfully demonstrated, and a 3-dB linewidth of 400 Hz at a carrier frequency of 50 GHz is achieved (stability ratio of 8 ppb). In addition, a two-element WSMA with an array aperture greater than 20 wavelengths is demonstrated using the proposed transceiver architecture. The reported transceiver includes a receiving on-chip antenna, a low-noise amplifier, an injectionlocked voltage-controlled oscillator, a buffer amplifier, an in-phase/quadrature generator, a phase shifter, a power amplifier, and a transmitting on-chip antenna.
Figure above: Chip micrograph of the receiver.
The chip is fabricated in a 65-nm CMOS process and occupies an area of 1.7 mm Å~ 3.8 mm. Our research sets the foundation for increasing the array aperture through wireless injection locking, extending traditional array systems into the high-resolution, narrow-beamwidth regime.
Babak Jamali, Aydin Babakhani, “A Self-Mixing Picosecond Impulse Receiver With an On-Chip Antenna for High-Speed Wireless Clock Synchronization”, Microwave Theory and Techniques IEEE Transactions on, vol. 66, no. 5, pp. 2313-2324, 2018.